There are a number of different types of semiconductor-based imager devices, including those employing charge coupled devices (CCDs), charge injection devices (CIDs), hybrid focal plane arrays, and complementary mental oxide semiconductor (CMOS) pixel arrays. Current applications of solid-state imager devices include cameras, scanners, machine vision systems, vehicle navigation systems, video telephones, computer input devices, surveillance systems, automatic focus systems, star trackers, motion detector systems, image stabilization systems, and other image acquisition and processing systems.
Imager devices are typically formed with an array of pixels each containing a photosensor, such as a photogate, phototransistor, photoconductor, or photodiode. The photosensor in each pixel absorbs incident radiation of a particular wavelength (e.g., optical photons or x-rays) and produces an electrical signal corresponding to the intensity of light impinging on that pixel when an optical image is focused on the pixel array. For example, the magnitude of the electrical signal produced by each pixel can be proportional to the amount of incident light captured. The electrical signals from all pixels are then processed to provide information about the captured optical image for storage, printing, transmission, display, or other usage.
Imager devices can be constructed so that incident light impinges on the frontside or alternatively the backside of the imager devices. For example, a backside illuminated imager device receives incident radiation through a backside of the device substrate, over which the imager device circuitry is formed.
Semiconductor-based imager devices, including those employing backside illumination, may have a P+ region that acts to getter or trap metal atoms or other contaminants entering into an imager device during fabrication. As metal atoms or contaminants migrate through the substrates of the imager device, they may become trapped, i.e. gettered, in the P+ region, where their effect on the pixel active circuitry and contribution to dark current is minimized. This provides a benefit over an imager device using an n-type substrate because n-type substrates are not as effective at gettering metallics and other contaminants; therefore, metals and other contaminants may migrate throughout the imager device and become lodged in the area of the substrate where the active devices and photo-sensitive devices are formed, and where they may contribute to the generation of dark current.
Imaging devices employing backside illumination typically utilize photo-diodes with depletion regions that extend to the backside surface for collection of electrons generated from shorter wavelengths of light (i.e., blue light), and improved quantum efficiency. However, the backside surface is prone to undesirable dark current electron generation due to silicon damage and surface states. A P+ region is desired along the backside surface to suppress and recombine these dark current generated electrons. If the P+ region along the backside surface becomes too thick it will degrade the photo-diode collection efficiency of shorter “blue” wavelengths (due to the photo-diode depletion region being pushed further away from the backside silicon surface).
The P+ surface along the backside surface may be formed by a p-type implant and activation step (e.g., laser anneal) post-silicon processing, or it can be formed prior to silicon processing during manufacture of a silicon on insulator (SOI) substrate—usually as a predefined P+ seed layer prior to EPI silicon growth in a SOI substrate. The formation of the P+ layer using the implant approach can damage the silicon surface resulting in higher levels of dark current or yield loss. Additionally, the predefined P+ seed layer thickness can be limited by the SOI manufacturing technology, and typically is too thick resulting in degradation of photosensor efficiency. FIGS. 1A-1D illustrate existing art and method of forming an SOI substrate with P+ seed layer (104).
Fabrication of a P+ region that mitigates the thick P+ region without using an implant and anneal process is desirable.